Intel HH80557RG041512 Scheda Tecnica

Document Number: 316963-002Intel® Celeron® Processor 400Δ Series Datasheet— Supporting the Intel® Celeron® processor 420Δ, 430Δ, 440Δ, and450ΔAugust 2

Introduction10 Datasheet1.1.1 Processor Packaging TerminologyCommonly used terms are explained here for clarification:• Intel Celeron Processor 400 Se

Debug Tools Specifications100 Datasheet

Datasheet 11Introduction1.2 ReferencesMaterial and concepts available in the following documents may be beneficial when reading this document.§Table 1

Introduction12 Datasheet

Datasheet 13Electrical Specifications2 Electrical SpecificationsThis chapter describes the electrical characteristics of the processor interfaces and

Electrical Specifications14 Datasheet2.2.3 FSB DecouplingThe processor integrates signal termination on the die. In addition, some of the high frequen

Datasheet 15Electrical SpecificationsTable 2. Voltage Identification DefinitionVID6VID5VID4VID3VID2VID1VCC_MAXVID6VID5VID4VID3VID2VID1VCC_MAX1111010.8

Electrical Specifications16 Datasheet2.4 Market Segment Identification (MSID)The MSID[1:0] signals may be used as outputs to determine the Market Segm

Datasheet 17Electrical SpecificationsThe TESTHI signals may use individual pull-up resistors or be grouped together as detailed below. A matched resis

Electrical Specifications18 DatasheetNOTES:1. For functional operation, all processor electrical, signal quality, mechanical and thermal specification

Datasheet 19Electrical Specifications2.6.2 DC Voltage and Current SpecificationNOTES:1. Unless otherwise noted, all specification in this table are ba

2 DatasheetINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO AN

Electrical Specifications20 Datasheet8. VTT must be provided via a separate voltage source and not be connected to VCC. This specification is measured

Datasheet 21Electrical SpecificationsNOTES:1. The loadline specification includes both static and transient limits except for overshoot allowed as sho

Electrical Specifications22 DatasheetNOTES:1. VOS is measured overshoot voltage.2. TOS is measured time duration above VID.2.6.4 Die Voltage Validatio

Datasheet 23Electrical Specifications2.7.1 FSB Signal GroupsThe front side bus signals have been combined into groups by buffer type. GTL+ input signa

Electrical Specifications24 DatasheetNOTES:1. Refer to Section 4.2 for signal descriptions.2. In processor systems where no debug port is implemented

Datasheet 25Electrical Specifications2.7.2 CMOS and Open Drain SignalsLegacy input signals such as A20M#, IGNNE#, INIT#, SMI#, and STPCLK# use CMOS in

Electrical Specifications26 Datasheet.NOTES:1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.2. VIL is d

Datasheet 27Electrical Specifications2.7.3.1 GTL+ Front Side Bus SpecificationsIn most cases, termination resistors are not required as these are inte

Electrical Specifications28 Datasheet2.8 Clock Specifications2.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor ClockingBCLK[1:0] directly controls

Datasheet 29Electrical Specifications2.8.2 FSB Frequency Select Signals (BSEL[2:0]) The BSEL[2:0] signals are used to select the frequency of the proc

Datasheet 3Contents1Introduction...91.1 Ter

Electrical Specifications30 Datasheet2.8.4 BCLK[1:0] Specifications (CK505 based Platforms) 1. Unless otherwise noted, all specifications in this tabl

Datasheet 31Electrical SpecificationsFigure 4. Differential Clock Crosspoint Specification660 670 680 690 700 710 720 730 740 750 760 770 780 790 800

Electrical Specifications32 Datasheet2.8.5 BCLK[1:0] Specifications (CK410 based Platforms)NOTES:1. Unless otherwise noted, all specifications in this

Datasheet 33Electrical SpecificationsFigure 6. Differential Clock WaveformFigure 7. Differential Clock Crosspoint SpecificationThresholdRegionVHVLOver

Electrical Specifications34 Datasheet2.9 PECI DC Specifications PECI is an Intel proprietary one-wire interface that provides a communication channel

Datasheet 35Package Mechanical Specifications3 Package Mechanical SpecificationsThe processor is packaged in a Flip-Chip Land Grid Array (FC-LGA6) pac

Package Mechanical Specifications36 DatasheetFigure 9. Processor Package Drawing Sheet 1 of 3

Datasheet 37Package Mechanical SpecificationsFigure 10. Processor Package Drawing Sheet 2 of 3

Package Mechanical Specifications38 DatasheetFigure 11. Processor Package Drawing Sheet 3 of 3

Datasheet 39Package Mechanical Specifications3.2 Processor Component Keep-Out ZonesThe processor may contain components on the substrate that define c

4 Datasheet5.2.2 Thermal Monitor 2 ...795.2.3 On-Demand Mode...

Package Mechanical Specifications40 Datasheet3.5 Package Insertion SpecificationsThe processor can be inserted into and removed from a LGA775 socket 1

Datasheet 41Package Mechanical Specifications3.9 Processor Land CoordinatesFigure 13 shows the top view of the processor land coordinates. The coordin

Package Mechanical Specifications42 Datasheet

Datasheet 43Land Listing and Signal Descriptions4 Land Listing and Signal DescriptionsThis chapter provides the processor land assignment and signal d

Land Listing and Signal Descriptions44 DatasheetFigure 14. land-out Diagram (Top View – Left Side)30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15ANVCC

Datasheet 45Land Listing and Signal DescriptionsFigure 15. land-out Diagram (Top View – Right Side)14 13 12 11 10 9 8 7 6 5 4 3 2 1VCC VSS VCC VCC VSS

Land Listing and Signal Descriptions46 DatasheetTable 23. Alphabetical Land AssignmentsLand NameLand #Signal Buffer TypeDirectionA3# L5 Source Synch I

Land Listing and Signal DescriptionsDatasheet 47D24# F12 Source Synch Input/OutputD25# D13 Source Synch Input/OutputD26# E13 Source Synch Input/Output

Land Listing and Signal Descriptions48 DatasheetFC37 AB3 Power/OtherFC38 G10 Power/Other FC39 AA2 Power/OtherFC40 AM6 Power/OtherFERR#/PBE# R3 Asynch

Land Listing and Signal DescriptionsDatasheet 49VCC AC24 Power/Other VCC AC25 Power/Other VCC AC26 Power/Other VCC AC27 Power/Other VCC AC28 Power

Datasheet 5Figures1VCC Static and Transient Tolerance...212VCC Overshoot Exa

Land Listing and Signal Descriptions50 DatasheetVCC AJ9 Power/Other VCC AK11 Power/Other VCC AK12 Power/Other VCC AK14 Power/Other VCC AK15 Power/

Land Listing and Signal DescriptionsDatasheet 51VCC K27 Power/Other VCC K28 Power/Other VCC K29 Power/Other VCC K30 Power/Other VCC K8 Power/Other

Land Listing and Signal Descriptions52 DatasheetVSS A18 Power/Other VSS A2 Power/Other VSS A21 Power/Other VSS A6 Power/Other VSS A9 Power/Other

Land Listing and Signal DescriptionsDatasheet 53VSS AH7 Power/Other VSS AJ10 Power/Other VSS AJ13 Power/Other VSS AJ16 Power/Other VSS AJ17 Power/

Land Listing and Signal Descriptions54 DatasheetVSS D24 Power/Other VSS D3 Power/Other VSS D5 Power/Other VSS D6 Power/Other VSS D9 Power/Other V

Land Listing and Signal DescriptionsDatasheet 55VSS R27 Power/Other VSS R28 Power/Other VSS R29 Power/Other VSS R30 Power/Other VSS R5 Power/Other

Land Listing and Signal Descriptions56 DatasheetTable 24. Numerical Land AssignmentLand #Land NameSignal Buffer TypeDirectionA2 VSS Power/Other A3 RS

Land Listing and Signal DescriptionsDatasheet 57C22 VSS Power/Other C23 VCCIOPLL Power/Other C24 VSS Power/Other C25 VTT Power/Other C26 VTT Power

Land Listing and Signal Descriptions58 DatasheetF15 D30# Source Synch Input/OutputF16 VSS Power/Other F17 D37# Source Synch Input/OutputF18 D38# Sour

Land Listing and Signal DescriptionsDatasheet 59J5 REQ1# Source Synch Input/OutputJ6 REQ4# Source Synch Input/OutputJ7 VSS Power/Other J8 VCC Power/O

6 Datasheet21 Package Handling Guidelines...3922 Processor Material

Land Listing and Signal Descriptions60 DatasheetN7 VSS Power/Other N8 VCC Power/Other N23 VCC Power/Other N24 VCC Power/Other N25 VCC Power/Other

Land Listing and Signal DescriptionsDatasheet 61V7 VSS Power/Other V8 VCC Power/Other V23 VSS Power/Other V24 VSS Power/Other V25 VSS Power/Other

Land Listing and Signal Descriptions62 DatasheetAC7 VSS Power/Other AC8 VCC Power/Other AC23 VCC Power/Other AC24 VCC Power/Other AC25 VCC Power/O

Land Listing and Signal DescriptionsDatasheet 63AF25 VSS Power/Other AF26 VSS Power/Other AF27 VSS Power/Other AF28 VSS Power/Other AF29 VSS Power

Land Listing and Signal Descriptions64 DatasheetAJ15 VCC Power/Other AJ16 VSS Power/Other AJ17 VSS Power/Other AJ18 VCC Power/Other AJ19 VCC Power

Land Listing and Signal DescriptionsDatasheet 65AM5 VID6 Power/Other OutputAM6 FC40 Power/OtherAM7 VID7 Power/Other OutputAM8 VCC Power/Other AM9 VC

Land Listing and Signal Descriptions66 Datasheet4.2 Alphabetical Signals ReferenceTable 25. Signal Description ( (Sheet 1 of 9))Name Type DescriptionA

Datasheet 67Land Listing and Signal DescriptionsBPM[5:0]#Input/OutputBPM[5:0]# (Breakpoint Monitor) are breakpoint and performance monitor signals. Th

Land Listing and Signal Descriptions68 DatasheetD[63:0]#Input/OutputD[63:0]# (Data) are the data signals. These signals provide a 64-bit data path bet

Datasheet 69Land Listing and Signal DescriptionsDEFER# InputDEFER# is asserted by an agent to indicate that a transaction cannot be guaranteed in-orde

Datasheet 7Revision History§Revision NumberDescription Date-001 • Initial release June 2007-002 • Added Intel® Celeron® processor 450 August 2008

Land Listing and Signal Descriptions70 DatasheetHIT#HITM#Input/OutputInput/OutputHIT# (Snoop Hit) and HITM# (Hit Modified) convey transaction snoop op

Datasheet 71Land Listing and Signal DescriptionsLOCK#Input/OutputLOCK# indicates to the system that a transaction must occur atomically. This signal m

Land Listing and Signal Descriptions72 DatasheetRS[2:0]# InputRS[2:0]# (Response Status) are driven by the response agent (the agent responsible for c

Datasheet 73Land Listing and Signal DescriptionsTHERMTRIP# OutputIn the event of a catastrophic cooling failure, the processor will automatically shut

Land Listing and Signal Descriptions74 Datasheet§VRDSEL InputThis input should be left as a no connect in order for the processor to boot. The process

Datasheet 75Thermal Specifications and Design Considerations5 Thermal Specifications and Design Considerations5.1 Processor Thermal SpecificationsThe

Thermal Specifications and Design Considerations76 Datasheetcomplete thermal solution designs target the Thermal Design Power (TDP) indicated in Table

Datasheet 77Thermal Specifications and Design ConsiderationsTable 27. Thermal ProfilePower (W)Maximum Tc (°C)PowerMaximum Tc (°C)0 43.2 20 53.02 44.2

Thermal Specifications and Design Considerations78 Datasheet5.1.2 Thermal MetrologyThe maximum and minimum case temperatures (TC) for the processor is

Datasheet 79Thermal Specifications and Design Considerationsperiods of TCC activation is expected to be so minor that it would be immeasurable. An und

8 DatasheetIntel® Celeron® Processor 400 Series Features The Intel Celeron processor 400 series delivers Intel's advanced, powerful processors fo

Thermal Specifications and Design Considerations80 DatasheetThe PROCHOT# signal is asserted when a high temperature situation is detected, regardless

Datasheet 81Thermal Specifications and Design Considerations5.2.4 PROCHOT# SignalAn external signal, PROCHOT# (processor hot), is asserted when the pr

Thermal Specifications and Design Considerations82 Datasheet5.3 Thermal DiodeThe processor incorporates an on-die PNP transistor where the base emitte

Datasheet 83Thermal Specifications and Design ConsiderationsNOTES:1. Intel does not support or recommend operation of the thermal diode under reverse

Thermal Specifications and Design Considerations84 Datasheet5.4 Platform Environment Control Interface (PECI)5.4.1 IntroductionPECI offers an interfac

Datasheet 85Thermal Specifications and Design Considerations..Figure 20. Conceptual Fan Control on PECI-Based PlatformsMinMaxFan Speed(RPM)TCONTROLSet

Thermal Specifications and Design Considerations86 Datasheet5.4.2 PECI Specifications5.4.2.1 PECI Device AddressThe PECI device address for the socket

Datasheet 87Features6 Features6.1 Power-On Configuration OptionsSeveral configuration options can be configured by hardware. The processor samples the

Features88 Datasheet6.2.1 Normal StateThis is the normal operating state for the processor.6.2.2 HALT and Extended HALT Powerdown StatesThe processor

Datasheet 89FeaturesThe system can generate a STPCLK# while the processor is in the HALT Power Down state. When the system deasserts the STPCLK# inter

Datasheet 9Introduction1 IntroductionThe Intel® Celeron® processor 400 series is a desktop processor that combines the performance of the previous gen

Features90 Datasheet6.2.4 HALT Snoop State and Stop Grant Snoop StateThe processor will respond to snoop transactions on the FSB while in Stop-Grant s

Datasheet 91Boxed Processor Specifications7 Boxed Processor SpecificationsThe processor will also be offered as an Intel boxed processor. Intel boxed

Boxed Processor Specifications92 Datasheet7.1 Mechanical Specifications7.1.1 Boxed Processor Cooling Solution DimensionsThis section documents the mec

Datasheet 93Boxed Processor SpecificationsNOTES:1. Diagram does not show the attached hardware for the clip design and is provided only as a mechanica

Boxed Processor Specifications94 Datasheet7.1.2 Boxed Processor Fan Heatsink WeightThe boxed processor fan heatsink will not weigh more than 450 grams

Datasheet 95Boxed Processor Specifications7.3 Thermal SpecificationsThis section describes the cooling requirements of the fan heatsink solution used

Boxed Processor Specifications96 Datasheet Figure 29. Boxed Processor Fan Heatsink Airspace Keepout Requirements (Top 1 view)Figure 30. Boxed Processo

Datasheet 97Boxed Processor Specifications7.3.2 Variable Speed FanThe boxed processor fan will operate at different speeds over a short range of inter

Boxed Processor Specifications98 Datasheet§ §

Datasheet 99Debug Tools Specifications8 Debug Tools Specifications8.1 Logic Analyzer Interface (LAI)Intel is working with two logic analyzer vendors t