Intel 8xC251TB Manuale Utente

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Release Date: December 2003
Order Number: 273138-002
The 8xC251Tx may contain design defects or errors known as errata which may cause
the product to deviate from published specifications. Such errata are not covered by
Intel's warranty. Current characterized errata are available on request.
Addendum to the 8xC251SA, 8xC251SB,
8xC251SP, 8xC251SQ, Users Manual
8xC251TB, 8xC251TQ,
Hardware Description
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Sommario

Pagina 1 - Hardware Description

Release Date: December 2003Order Number: 273138-002The 8xC251Tx may contain design defects or errors known as errata which may cause the product to de

Pagina 2

8xC251Tx Hardware Description4P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7I/O Port 3. This is an 8 bit, bidirectional I/O port with internal pullups RXD TX

Pagina 3 - REVISION HISTORY:

58xC251Tx Hardware DescriptionVCC2PWR Secondary Supply Voltage 2. This supply voltage connection is pro-vided to reduce power supply noise. Connection

Pagina 4

8xC251Tx Hardware Description6Table 3. Special Function Register (SFR) Map F8CH00000000CCAP0HxxxxxxxxCCAP1HxxxxxxxxCCAP2HxxxxxxxxCCAP3HxxxxxxxxCCAP4Hx

Pagina 5

78xC251Tx Hardware Description3.0 THE SECOND SERIAL I/O PORTThe second serial I/O port is functionally the same as the standard serial I/O port shared

Pagina 6

8xC251Tx Hardware Description8The second serial I/O port interrupt is enabled by setting the ES1 bit in the IE1 register. The priority of the second s

Pagina 7

98xC251Tx Hardware Description3.2 Special Function Register DefinitionsThe following describes the special function registers associated with the seco

Pagina 8 - 2.0 SIGNAL SUMMARY

8xC251Tx Hardware Description103.2.2 SBUF1Address: 9BH Reset Value: xxxx xxxxBTo send serial data, software writes a byte to SBUF1 and to receive seri

Pagina 9

118xC251Tx Hardware Description3.2.6 IE1Address: B1H Reset Value: xxxx xxx0B3.2.7 IPH1Address: B3H Reset Value: xxxx xxx0B3.2.8 IPL1Address: B2H Reset

Pagina 10 - 8xC251Tx Hardware Description

8xC251Tx Hardware Description124.0 EXTENDED DATA FLOAT TIMINGThe Extended Data Float Timing feature seeks to provide a solution to users that may be u

Pagina 11

138xC251Tx Hardware DescriptionTable 13 shows the effect of programming EDF# and WSB#[1:0] on the extended data float timing feature as well as the in

Pagina 12

Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellect

Pagina 14

273138-002 December 2003 iii8xC251Tx Hardware DescriptionREVISION HISTORY:Date Revision DescriptionNovember 1997 001 Initial release of this documentD

Pagina 15

iv December 2003 273138-0028xC251Tx Hardware Description

Pagina 16

273138-002 December 2003 v8xC251Tx Hardware Description8xC251TB, 8xC251TQ Hardware DescriptionAddendum to the 8xC251SA, 8xC251SB, 8xC251SP, 8xC251SQ,

Pagina 17

8xC251Tx Hardware Descriptionvi December 2003 273138-002

Pagina 18

18xC251Tx Hardware Description1.0 INTRODUCTION TO THE 8xC251TxThis Hardware Description describes the 8xC251TB, 8xC251TQ (referred to collectively as

Pagina 19

8xC251Tx Hardware Description22.0 SIGNAL SUMMARYTable 1. 8xC251Tx Signal SummaryAddress & Data Input/OutputName PLCC DIP Name PLCC DIPAD0/P0.0 43

Pagina 20

38xC251Tx Hardware DescriptionTable 2. 8xC251Tx Signal Descriptions (Sheet 1 of 3)Signal NameType DescriptionAlternate FunctionA17 O Address Line 17.

Modelli collegati 8XC251SB | 8XC251SQ | 8xC251TQ |

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