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Intel® Server Board SE7320SP2 & Intel Server Board SE7525GP2 TPS System BIOS
Revision 2.0
77
4.4.2.2 IDE Configuration Sub-menu
Table 23. BIOS Setup IDE Configuration Menu Options
Feature Options Help Text Description
IDE Configuration
Onboard P-ATA
Channels
Disabled
Primary
Secondary
Both
Disabled: disables the
integrated P-ATA Controller.
Primary: enables only the
Primary P-ATA Controller.
Secondary: enables only the
Secondary P-ATA Controller.
Both: enables both P-ATA
Controllers.
Controls state of integrated P-
ATA controller.
Onboard S-ATA
Channels
Disabled
Enabled
Disabled: disables the
integrated S-ATA Controller.
Enabled: enables the
integrated S-ATA Controller.
Controls state of integrated S-
ATA controller.
Configure S-ATA as
RAID
Disabled
Enabled
When enabled the S-ATA
channels are reserved to be
used as RAID.
S-ATA Ports
Definition
A1-3
rd
M/A2-4
th
M
A1-4
th
M/A2-3
rd
M
Defines priority between S-
ATA channels.
Default set the S-ATA Port0 to
3
rd
IDE Master channel & Port1
to 4
th
IDE Master channel.
Otherwise set S-ATA Port0 to 4
th
IDE Master channel & Port1 to
3
rd
IDE Master channel.
Mixed P-ATA / S-
ATA
N/A
Lets you remove a P-ATA and
replace it by S-ATA in a given
channel. Only 1 channel can
be S-ATA.
Selects submenu for configuring
mixed P-ATA and S-ATA.
Primary IDE Master N/A
While entering setup, BIOS
auto detects the presence of
IDE devices. This displays the
status of auto detection of IDE
devices.
Selects submenu with additional
device details.
Primary IDE Slave N/A
While entering setup, BIOS
auto detects the presence of
IDE devices. This displays the
status of auto detection of IDE
devices.
Selects submenu with additional
device details.
Secondary IDE
Master
N/A
While entering setup, BIOS
auto detects the presence of
IDE devices. This displays the
status of auto detection of IDE
devices.
Selects submenu with additional
device details.
Secondary IDE
Slave
N/A
While entering setup, BIOS
auto detects the presence of
IDE devices. This displays the
status of auto detection of IDE
devices.
Selects submenu with additional
device details.
Third IDE Master N/A
While entering setup, BIOS
auto detects the presence of
IDE devices. This displays the
status of auto detection of IDE
devices.
Selects submenu with additional
device details.
- Intel Server Board SE7525GP2 1
- Revision History 2
- Disclaimers 3
- Table of Contents 4
- Revision 2.0 10
- List of Figures 12
- List of Tables 13
- 1. Introduction 17
- 2. Server Board Overview 19
- SE7320SP2 Layout Reference 20
- 2.2.1 SE7525GP2 Feature Set 22
- SE7525GP2 Layout Reference 23
- 3. Functional Architecture 25
- 3.1 Processor Sub-system 27
- 3.1.6 Processor Support 28
- 3.2 E7320 Chipset 32
- 3.3 E7525 Chipset 33
- 3.4 Intel® 6300ESB ICH 35
- 3.5 Memory Sub-System 38
- 3.5.2 Memory Population 39
- 3.6 I/O Sub-System 45
- 3.6.2 Split Option ROM 47
- 3.6.3 Interrupt Routing 47
- 3.6.4 IDE Support 51
- 3.6.5 SATA Support 51
- 3.6.6 Video Controller 52
- Table 11: Video Modes 53
- 3.6.8 USB 2.0 Support 54
- 3.6.9 Super I/O Chip 55
- 3.6.9.1 GPIOs 56
- 3.6.10 BIOS Flash 57
- 3.7.2 I/O Map 63
- 3.8.1 Real Time Clock 68
- 4. System BIOS 69
- 4.2 BIOS POST Splash Screen 70
- 4.3 BIOS Setup Utility 72
- 4.3.4 Keyboard Commands 73
- 4.4 Entering BIOS Setup 74
- 4.4.2 Advanced Menu 75
- 4.4.3 Boot Menu 84
- 4.4.4 Security Menu 86
- 4.4.5 Server Menu 87
- 4.5 Flash Update Utility 90
- 4.7 Flash Update Utility 91
- 4.7.1 Flash BIOS 92
- 4.7.2 User Binary Area 93
- 4.7.3 Recovery Mode 93
- 4.7.4 Update OEM Logo 95
- 4.8 OEM Binary 96
- 4.10 Security 100
- 4.10.1 Operating Model 101
- 4.10.3 Password Clear Jumper 103
- 4.11.1 EFI Shell 103
- 5. Platform Management 104
- 5.1.1 5V Standby 105
- 5.1.3 IPMI ‘Sensor Model’ 105
- 5.2.1 Overview of mBMC 108
- 5.2.2 mBMC Self-test 108
- 5.2.3 SMBus Interfaces 109
- 5.2.5 Messaging Interfaces 110
- System Bus 112
- 5.2.8 Watchdog Timer 114
- 5.2.13 NMI Generation 118
- Power Sub System 119
- Power Good 119
- Power ON 119
- 5.3.2 System Reset Control 120
- 5.3.4 Front Panel Control 122
- 5.3.4.7 Front Panel Lockout 124
- 5.3.5 Secure Mode Operation 125
- 5.3.6 FRU Information 125
- 5.4 Sensors 126
- 6.1 Error Logging 132
- 6.2.3 POST Error Beep Codes 138
- 6.3 Checkpoints 139
- 6.3.3 POST Code Checkpoints 140
- 6.3.6 DIM Code Checkpoints 144
- 6.3.8 Memory Error Codes 145
- 7.1 Main Power Connector 146
- 7.2 Memory Module Connector 147
- 7.3 Processor Socket 148
- C Headers 151
- 7.5 PCI Slot Connector 151
- 7.6 Front Panel Connector 155
- 7.7 VGA Connector 156
- 7.8 NIC Connector 156
- 7.9 IDE Connector 157
- 7.10 SATA Connectors 157
- 7.11 USB Connector 158
- 7.12 Floppy Connector 159
- 7.13 Serial Port Connector 159
- 7.15 Miscellaneous Headers 160
- 7.16 Configuration Jumpers 161
- 8. General Specifications 164
- 8.4.1 Power Timing 165
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