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Reference Number: 323370-001Intel® Xeon® Processor 5600 SeriesDatasheet, Volume 2March 2010

Register Description10 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.2 Platform Configuration StructureThe processor contains 6 PCI devices w

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 11Register DescriptionDID of 2DA0h. Device 4, Function 1 contains the address registers for Inte

Register Description12 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Notes:1. Applies only to processors with two Intel QPI links.2. Applies on

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 13Register Description2.4 Detailed Configuration Space MapsTable 2-2. Device 0, Function 0: Gene

Register Description14 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-3. Device 0, Function 1: System Address Decoder RegistersDID VID 0

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 15Register DescriptionTable 2-4. Device 2, Function 0: Intel QPI Link 0 RegistersDID VID 00h 80h

Register Description16 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-5. Device 2, Function 1: Intel QPI Physical 0 RegistersDID VID 00h

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 17Register DescriptionTable 2-6. Device 2, Function 2: Mirror Port Link 0 RegistersDID VID 00h 8

Register Description18 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-7. Device 2, Function 3: Mirror Port Link 1 RegistersDID VID 00h 8

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 19Register DescriptionNote:1. Applies only to processors with two Intel QPI links.Table 2-8. Dev

2 Intel® Xeon® Processor 5600 Series Datasheet Volume 2INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRES

Register Description20 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-9. Device 2, Function 5: Intel QPI Physical 1 RegistersDID VID 00h

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 21Register Description Table 2-10. Device 3, Function 0: Integrated Memory Controller RegistersD

Register Description22 Intel® Xeon® Processor 5600 Series Datasheet Volume 2 Table 2-11. Device 3, Function 1: Target Address Decoder RegistersDID VID

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 23Register DescriptionNote:1. Applies only to processors supporting registered DIMMs.Table 2-12.

Register Description24 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-13. Device 3, Function 4: Integrated Memory Controller Test Regist

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 25Register DescriptionTable 2-14. Device 4, Function 0: Integrated Memory Controller Channel 0 C

Register Description26 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-15. Device 4, Function 1: Integrated Memory Controller Channel 0 A

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 27Register DescriptionTable 2-16. Device 4, Function 2: Integrated Memory Controller Channel 0 R

Register Description28 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-17. Device 4, Function 3: Integrated Memory Controller Channel 0 T

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 29Register DescriptionTable 2-18. Device 5, Function 0: Integrated Memory Controller Channel 1 C

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 3Contents1Introduction...

Register Description30 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-19. Device 5, Function 1: Integrated Memory Controller Channel 1 A

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 31Register DescriptionTable 2-20. Device 5, Function 2: Integrated Memory Controller Channel 1 R

Register Description32 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-21. Device 5, Function 3: Integrated Memory Controller Channel 1 T

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 33Register DescriptionTable 2-22. Device 6, Function 0: Integrated Memory Controller Channel 2 C

Register Description34 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Table 2-23. Device 6, Function 1: Integrated Memory Controller Channel 2 A

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 35Register DescriptionTable 2-24. Device 6, Function 2: Integrated Memory Controller Channel 2 R

Register Description36 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.5 PCI Standard RegistersThese registers appear in every function for eve

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 37Register Description2.5.1 DID - Device Identification RegisterThis 16-bit register combined wi

Register Description38 Intel® Xeon® Processor 5600 Series Datasheet Volume 2defined and is implementation dependent. This does not result in all of th

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 39Register Description2.7 SAD - System Address Decoder Registers2.7.1 SAD_MCSEG_BASEGlobal regis

4 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.11.6 MC_CHANNEL_0_SCHEDULER_PARAMSMC_CHANNEL_1_SCHEDULER_PARAMSMC_CHANNEL_2_SCHEDULER_PARAMS.

Register Description40 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.7.4 SAD_MESEG_MASKRegister for ME stolen range address space. They are d

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 41Register Description2.8.2 QPI_RMT_QPILP1_STAT_L0QPI_RMT_QPILP1_STAT_L1Remote’s Intel QPI Param

Register Description42 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.8.4 MIP_PH_PRT_L0MIP_PH_PRT_L1Mirror Port periodic retraining timing reg

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 43Register Description2.9.1 MC_SMI_DIMM_ERROR_STATUSSMI DIMM error threshold overflow status reg

Register Description44 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.9.3 MC_MAX_DODDefines the MAX number of DIMMS, RANKS, BANKS, ROWS, COLS

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 45Register Description2.9.4 MC_RD_CRDT_INITThese registers contain the initial read credits avai

Register Description46 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.9.5 MC_SCRUBADDR_HIThis register pair contains part of the address of th

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 47Register Description2.10.3 MC_SSRSTATUSProvides the status of the operation specified in MC_SS

Register Description48 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.11.2 MC_CHANNEL_0_RANK_TIMING_AMC_CHANNEL_1_RANK_TIMING_AMC_CHANNEL_2_RA

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 49Register Description22:19 RW 0 tsrWrTRd. Minimum delay between a write followed by a read to t

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 5FiguresTables1-1 References...

Register Description50 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.11.3 MC_CHANNEL_0_REFRESH_TIMINGMC_CHANNEL_1_REFRESH_TIMINGMC_CHANNEL_2_

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 51Register Description2.11.4 MC_CHANNEL_0_CKE_TIMINGMC_CHANNEL_1_CKE_TIMINGMC_CHANNEL_2_CKE_TIMI

Register Description52 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.11.6 MC_CHANNEL_0_SCHEDULER_PARAMSMC_CHANNEL_1_SCHEDULER_PARAMSMC_CHANNE

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 53Register Description2.12 Memory Thermal Control2.12.1 MC_THERMAL_STATUS0MC_THERMAL_STATUS1MC_T

Register Description54 Intel® Xeon® Processor 5600 Series Datasheet Volume 22.12.3 MC_DDR_THERM1_COMMAND0MC_DDR_THERM1_COMMAND1MC_DDR_THERM1_COMMAND2T

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 55Register Description2.12.5 MC_DDR_THERM1_STATUS0MC_DDR_THERM1_STATUS1MC_DDR_THERM1_STATUS2This

Register Description56 Intel® Xeon® Processor 5600 Series Datasheet Volume 2

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 57Functional Description3 Functional DescriptionThis chapter describes the functional difference

Functional Description58 Intel® Xeon® Processor 5600 Series Datasheet Volume 23.2 Supported RDIMM Memory Configurations3.2.1 RDIMM 1.5 V Configuration

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 59Functional Description3.2.2 RDIMM 1.35 V ConfigurationsNotes:1. The Intel Xeon processor 5600

6 Intel® Xeon® Processor 5600 Series Datasheet Volume 2Revision History§Revision Description Date-001 Initial release. March 2010

Functional Description60 Intel® Xeon® Processor 5600 Series Datasheet Volume 21. The Intel Xeon processor 5600 series supports all Intel Xeon processo

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 61Functional Description3.3.2 UDIMM 1.35V ConfigurationsNotes:1. The Intel Xeon processor 5600 s

Functional Description62 Intel® Xeon® Processor 5600 Series Datasheet Volume 23.5 Memory Error Signaling3.5.1 Enabling SMI/NMI for Memory Corrected Er

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 63Functional Description3.7 2X RefreshThe Intel Xeon processor 5600 series supports 2X refresh v

Functional Description64 Intel® Xeon® Processor 5600 Series Datasheet Volume 2

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 7Introduction1 IntroductionThe Intel® Xeon® processor 5600 series is the next generation DP serv

Introduction8 Intel® Xeon® Processor 5600 Series Datasheet Volume 2

Intel® Xeon® Processor 5600 Series Datasheet Volume 2 9Register Description2 Register DescriptionThe processor supports PCI configuration space access