Intel 41210 Manuale Utente Pagina 1

Navigare online o scaricare Manuale Utente per Hardware Intel 41210. Intel 41210 User Manual Manuale Utente

  • Scaricare
  • Aggiungi ai miei manuali
  • Stampa
  • Pagina
    / 64
  • Indice
  • SEGNALIBRI
  • Valutato. / 5. Basato su recensioni clienti
Vedere la pagina 0
Intel® 41210 Serial to Parallel PCI
Bridge
Design Guide
May 2005
Order Number: 278801-004
Vedere la pagina 0
1 2 3 4 5 6 ... 63 64

Sommario

Pagina 1 - Design Guide

Intel® 41210 Serial to Parallel PCI BridgeDesign GuideMay 2005Order Number: 278801-004

Pagina 2

10 Intel® 41210 Serial to Parallel PCI Bridge Design GuideIntroduction• Tunable inbound read prefetch algorithm for PCI MRM/MRL commands• Local initia

Pagina 3 - Contents

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 11Introduction2.4.2 Microcontroller Connections to the 41210 BridgeThe following diagram shows

Pagina 4

12 Intel® 41210 Serial to Parallel PCI Bridge Design GuideIntroduction2.5 JTAG• Compliant with IEEE Standard Test Access Port and Boundary Scan Archit

Pagina 5 - Revision History

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 13Introduction2.7 Intel®41210 Serial to Parallel PCI Bridge ApplicationsThis section provides

Pagina 6

14 Intel® 41210 Serial to Parallel PCI Bridge Design GuideIntroductionThis page intentionally left blank.

Pagina 7 - About This Document 1

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 15Package Information 33.1 Package SpecificationThe 41210 Bridge is in a 567-ball FCBGA packag

Pagina 8 - About This Document

16 Intel® 41210 Serial to Parallel PCI Bridge Design GuidePackage InformationFigure 6. Bottom View - 41210 Bridge 567-Ball FCBGA Package DimensionsB2

Pagina 9 - Introduction 2

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 17Package InformationFigure 7. Side View - 41210 Bridge 567-Ball FCBGA Package DimensionsB271

Pagina 10 - 2.4 SMBus Interface

18 Intel® 41210 Serial to Parallel PCI Bridge Design GuidePackage InformationThis page intentionally left blank.

Pagina 11 - Microcontroller

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 19Power Plane Layout 4This chapter provides details on the decoupling and voltage planes need

Pagina 12 - 2.6 Related Documents

ii Intel® 41210 Serial to Parallel PCI Bridge Design GuideINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXP

Pagina 13 - Applications

20 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Power Plane LayoutFigure 9. Decoupling Placement for PCI/PCI-X 1.5V and 3.3V Voltage Plane

Pagina 14 - Introduction

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 21Power Plane LayoutTable 2. 41210 Bridge Decoupling Guidelines4.2 Split Voltage PlanesThere

Pagina 15 - Package Information 3

22 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Power Plane LayoutNote: Linear voltage regulators are recommended when using 1.5 Volt power

Pagina 16 - Package Information

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 2341210 Bridge Reset and Power Timing Considerations 5This chapter describes the 41210 Bridge

Pagina 17

24 Intel® 41210 Serial to Parallel PCI Bridge Design Guide 41210 Bridge Reset and Power Timing ConsiderationsThis page intentionally left blank.

Pagina 18

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 25General Routing Guidelines 6This chapter provides some basic routing guidelines for layout

Pagina 19 - Power Plane Layout 4

26 Intel® 41210 Serial to Parallel PCI Bridge Design Guide General Routing Guidelines• Avoid slots in the ground plane. Slots increases mutual inducta

Pagina 20 - 1206-10 F

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 27General Routing Guidelines6.4 Power Distribution and DecouplingHave ample decoupling to gro

Pagina 21 - 4.2 Split Voltage Planes

28 Intel® 41210 Serial to Parallel PCI Bridge Design Guide General Routing GuidelinesNote: Using stripline transmission lines may give better results

Pagina 22 - B2715-01

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 29Board Layout Guidelines 7This chapter provides details on adapter card stackup suggestions.

Pagina 23 - Considerations 5

Intel® 41210 Serial to Parallel PCI Bridge Design Guide iiiContentsContents1 About This Document ...

Pagina 24

30 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Board Layout GuidelinesNOTE: Each interface will set the trace spacing based on its signal

Pagina 25 - General Routing Guidelines 6

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 31PCI-X Layout Guidelines 8This chapter describes several factors to be considered with a 412

Pagina 26 - 6.3 EMI Considerations

32 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout GuidelinesNote: PCI Express Assert_INTx/Deassert_INTx messages are not inhibit

Pagina 27 - 6.5 Trace Impedance

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 33PCI-X Layout Guidelines• Priority group for a master (i.e., whether a master is in low prio

Pagina 28 - B2717 -01

34 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout GuidelinesTable 7. PCI/PCI-X Frequency/Mode StrapsNote: All signals sampled o

Pagina 29 - Board Layout Guidelines 7

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 35PCI-X Layout GuidelinesB_CBE#[7:4], B_DEVSEL#, B_FRAME#, B_INTA#, B_INTB#, B_INTC#, B_INTD#

Pagina 30 - Board Layout Guidelines

36 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout GuidelinesFigure 17. PCI Clock Distribution and Matching RequirementsB1499-04

Pagina 31 - PCI-X Layout Guidelines 8

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 37PCI-X Layout GuidelinesTable 8. PCI-X Clock Layout Requirements SummaryParameter Routing G

Pagina 32 - 8.2 PCI Arbitration

38 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout Guidelines8.5 PCI-X Topology Layout GuidelinesThe PCI-X Addendum to the PCI Lo

Pagina 33 - B2718 -01

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 39PCI-X Layout Guidelines8.6.1 Embedded PCI-X 133 MHzThis section lists the routing recommend

Pagina 34

iv Intel® 41210 Serial to Parallel PCI Bridge Design GuideContents8.6.1 Embedded PCI-X 133 MHz ...

Pagina 35 - Ω resistor

40 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout Guidelines8.6.2 Embedded PCI-X 100 MHzThis section lists the embedded routing

Pagina 36 - PCI-X Layout Guidelines

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 41PCI-X Layout Guidelines8.6.3 PCI-X 66 MHz Embedded TopologyFigure 20 and Table 12 provide r

Pagina 37

42 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout Guidelines8.6.4 PCI 66 MHz Embedded TopologyFigure 21 and Table 13 provide rou

Pagina 38 - Guide Layout Analysis

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 43PCI-X Layout Guidelines8.6.5 PCI 33 MHz Embedded Mode TopologyFigure 22 and Table 14 provid

Pagina 39

44 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout GuidelinesThis page intentionally left blank.

Pagina 40

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 45PCI Express Layout 9This section provides an overview of the PCI-Express stackup recommende

Pagina 41

46 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI Express Layout9.2 PCI-Express Layout GuidelinesThe layout guidelines for PCI-Express we

Pagina 42

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 47PCI Express LayoutReceive Trace Length (Card edge finger to 41210 Bridge receiver pin1.0” m

Pagina 43

48 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI Express LayoutThis page intentionally left blank.

Pagina 44

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 49Circuit Implementations 10This chapter describes 41210 Bridge circuit implementations.10.1

Pagina 45 - PCI Express Layout 9

Intel® 41210 Serial to Parallel PCI Bridge Design Guide vContents22 PCI 33 MHz Embedded Mode Routing Topology...

Pagina 46

50 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Circuit Implementations10.1.1 PCI Analog Voltage FiltersThe following filter circuit is rec

Pagina 47 - PCI Express Layout

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 51Circuit ImplementationsFigure 24. PCI Express Analog Voltage Filter CircuitNote: .• Place

Pagina 48

52 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Circuit ImplementationsFigure 25. Bandgap Analog Voltage Filter CircuitNote: .• Place C as

Pagina 49 - Circuit Implementations 10

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 53Circuit Implementations10.2 Intel® 41210 Serial to Parallel PCI Bridge Reference and Compen

Pagina 50 - B2724 -01

54 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Circuit Implementations10.2.1 SM BusThe SMBus interface does not have configuration registe

Pagina 51 - B2725 -01

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 5541210 Bridge Customer Reference Boards 11This chapter describes the 41210 Bridge Customer

Pagina 52 - B2726 -01

56 Intel® 41210 Serial to Parallel PCI Bridge Design Guide 41210 Bridge Customer Reference Boards11.2 MaterialThe following materials are used with th

Pagina 53 - PE_RCOMP[1]

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 5741210 Bridge Customer Reference Boards11.4 Board OutlineFigure 27 provides the mechanical o

Pagina 54 - 10.2.1 SM Bus

58 Intel® 41210 Serial to Parallel PCI Bridge Design Guide 41210 Bridge Customer Reference BoardsThis page intentionally left blank.

Pagina 55 - Boards 11

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 59Design Guide Checklist 12This checklist highlights design considerations that should be rev

Pagina 56 - 11.3 Impedance

vi Intel® 41210 Serial to Parallel PCI Bridge Design GuideContents This page intentionally left blank.

Pagina 57 - 11.4 Board Outline

60 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Design Guide ChecklistTable 20. PCI/PCI-X Interface SignalsSignals Recommendations Reason/

Pagina 58

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 61Design Guide ChecklistA_M66ENB_M66ENControls frequency of the PCI segment when running in c

Pagina 59 - Design Guide Checklist 12

62 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Design Guide ChecklistTable 21. Miscellaneous SignalsSignals Recommendations Reason/Impact

Pagina 60 - Design Guide Checklist

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 63Design Guide ChecklistTable 23. Power and Ground SignalsSignal Recommendations Reason/Impa

Pagina 61 - •Connect this pin to

64 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Design Guide ChecklistTable 24. JTAG SignalsSignal Recommendations Reason/ImpactTCK If not

Pagina 62

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 7About This Document 1This document provides layout information and guidelines for designing p

Pagina 63

8 Intel® 41210 Serial to Parallel PCI Bridge Design GuideAbout This DocumentPCBPrinted circuit board. Example manufacturing process consists of the fo

Pagina 64 - Table 24. JTAG Signals

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 9Introduction 2The Intel®41210 Serial to Parallel PCI Bridge integrates two PCI Express-to-PC

Commenti su questo manuale

Nessun commento