Intel EU80574XL088N Scheda Tecnica Pagina 5
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- Indice
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Datasheet 5
Revision History
Revision Description Date
-001 Initial release February 2008
- Core™2 Extreme Processor 1
- Contents 3
- 4 Datasheet 4
- Revision History 5
- 6 Datasheet 6
- Features 7
- 8 Datasheet 8
- 1 Introduction 9
- 1.1 Terminology 10
- Datasheet 11 11
- Introduction 11
- 1.2 References 12
- 2 Electrical Specifications 13
- 2.3 Decoupling Guidelines 14
- Clocking 15
- 2.4.2 PLL Power Supply 16
- Datasheet 17 17
- Electrical Specifications 17
- 18 Datasheet 18
- Datasheet 19 19
- 20 Datasheet 20
- Datasheet 21 21
- Asynchronous Signals 22
- DC Specifications 22
- Datasheet 23 23
- 2.11 Mixing Processors 24
- Datasheet 25 25
- 26 Datasheet 26
- Time Duration (s) 27
- Sustained Current (A) 27
- Table 2-13. Processor V 28
- Figure 2-3. Processor V 29
- 2.13.1 V 30
- Overshoot Specification 30
- Example Overshoot Waveform 31
- 2.14 AGTL+ FSB Specifications 32
- Datasheet 33 33
- Tp = T1: BCLK[1:0] period 34
- Datasheet 35 35
- Mechanical Specifications 35
- 36 Datasheet 36
- Datasheet 37 37
- 38 Datasheet 38
- Datasheet 39 39
- 3.7 Processor Materials 40
- 3.8 Processor Markings 41
- 42 Datasheet 42
- Datasheet 43 43
- 44 Datasheet 44
- 4 Land Listing and Signal 45
- Description 45
- Name (Sheet 1 of 17) 46
- Name (Sheet 2 of 17) 46
- Name (Sheet 3 of 17) 47
- Name (Sheet 4 of 17) 47
- Name (Sheet 5 of 17) 48
- Name (Sheet 6 of 17) 48
- Name (Sheet 7 of 17) 49
- Name (Sheet 8 of 17) 49
- Name (Sheet 9 of 17) 50
- Name (Sheet 10 of 17) 50
- Name (Sheet 11 of 17) 51
- Name (Sheet 12 of 17) 51
- Name (Sheet 13 of 17) 52
- Name (Sheet 14 of 17) 52
- Name (Sheet 15 of 17) 53
- Name (Sheet 16 of 17) 53
- Name (Sheet 17 of 17) 54
- Number (Sheet 1 of 17) 55
- Number (Sheet 2 of 17) 55
- Number (Sheet 3 of 17) 56
- Number (Sheet 4 of 17) 56
- Number (Sheet 5 of 17) 57
- Number (Sheet 6 of 17) 57
- Number (Sheet 7 of 17) 58
- Number (Sheet 8 of 17) 58
- Number (Sheet 9 of 17) 59
- Number (Sheet 10 of 59
- Number (Sheet 11 of 60
- Number (Sheet 12 of 60
- Number (Sheet 13 of 61
- Number (Sheet 14 of 61
- Number (Sheet 15 of 62
- Number (Sheet 16 of 62
- Number (Sheet 17 of 63
- 4.2 Signal Definitions 64
- Datasheet 65 65
- 66 Datasheet 66
- Datasheet 67 67
- 68 Datasheet 68
- 70 Datasheet 70
- 72 Datasheet 72
- Datasheet 73 73
- 74 Datasheet 74
- 5 Thermal Specifications 75
- Thermal Specifications 76
- 76 Datasheet 76
- 5.1.2 Thermal Metrology 77
- 5.2.1.1 Thermal Monitor (TM1) 78
- Datasheet 79 79
- 80 Datasheet 80
- 5.2.4 FORCEPR# Signal 81
- 5.2.5 THERMTRIP# Signal 81
- 5.3.1 Introduction 81
- PECI Host 82
- Controller 82
- 5.3.1.1 T 83
- 5.3.2.1 PECI Device Address 84
- 5.3.2.2 PECI Command Support 84
- 6 Features 85
- 6.2.2.1 HALT State 86
- 6.2.2.2 Extended HALT State 87
- Stop Grant Snoop State 88
- 6.3 Enhanced Intel SpeedStep 89
- Technology 89
- Features 90
- 90 Datasheet 90
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