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Datasheet, Volume 1 65

Signal Description

6 Signal Description

This chapter describes the processor signals. They are arranged in functional groups

according to their associated interface or category. The following notations are used to

describe the signal type.

The signal description also includes the type of buffer used for the particular signal

(see Table 6-1).

Note:

1. Qualifier for a buffer type.

Notations Signal Type

I Input Signal

O Output Signal

I/O Bi-directional Input/Output Signal

Table 6-1. Signal Description Buffer Types

Signal Description

PCI Express*

PCI Express* interface signals. These signals are compatible with PCI Express* 3.0

Signalling Environment AC Specifications and are AC coupled. The buffers are not

3.3-V tolerant. Refer to the PCIe specification.

DMI

Direct Media Interface signals. These signals are compatible with PCI Express* 2.0

Signaling Environment AC Specifications, but are DC coupled. The buffers are not

3.3-V tolerant.

CMOS CMOS buffers.

DDR3 DDR3 buffers: 1.5-V tolerant

Analog reference or output. May be used as a threshold voltage or for buffer

compensation

Ref Voltage reference signal

Asynchronous

Signal has no timing relationship with any reference clock.

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Intel CM8063701391800 Scheda Tecnica Pagina 65