Intel 2760QM Scheda Tecnica Pagina 296
- Pagina / 564
- Indice
- SEGNALIBRI
Valutato. / 5. Basato su recensioni clienti
Processor Uncore Configuration Registers
296 Datasheet, Volume 2
Table 4-14. Memory Controller Channel 2 DIMM Timing Registers: Bus N, Device 16,
Function 0, Offset 300h–3FCh
Memory Controller Channel 3 DIMM Timing Registers: Bus N, Device 16,
Function 1, Offset 300h–3FCh
Memory Controller Channel 0 DIMM Timing Registers: Bus N, Device 16,
Function 4, Offset 300h–3FCh
Memory Controller Channel 1 DIMM Timing Registers: Bus N, Device 16,
Function 5, Offset 300h–3FCh
RSP_FUNC_MCCTRL_ERR_INJ 300h 380h
PWMM_STARV_CNTR_PRESCALER 304h
384h
WDBWM 308h
388h
WDAR_MODE 30Ch
38Ch
310h 390h
314h 394h
318h 398h
31Ch 39Ch
320h 3A0h
324h 3A4h
328h 3A8h
32Ch 3ACh
330h 3B0h
334h 3B4h
SPARING 338h
3B8h
33Ch 3BCh
340h 3C0h
344h 3C4h
348h 3C8h
34Ch 3CCh
350h 3D0h
354h 3D4h
358h 3D8h
35Ch 3DCh
360h 3E0h
364h 3E4h
368h 3E8h
36Ch 3ECh
370h 3F0h
374h 3F4h
378h 3F8h
37Ch 3FCh
- Datasheet, Volume 2 1
- November 2011 1
- Contents 3
- 4 Datasheet, Volume 2 4
- Datasheet, Volume 2 5 5
- 6 Datasheet, Volume 2 6
- Datasheet, Volume 2 7 7
- 8 Datasheet, Volume 2 8
- Datasheet, Volume 2 9 9
- 10 Datasheet, Volume 2 10
- Datasheet, Volume 2 11 11
- 12 Datasheet, Volume 2 12
- Datasheet, Volume 2 13 13
- 14 Datasheet, Volume 2 14
- Datasheet, Volume 2 15 15
- 16 Datasheet, Volume 2 16
- Datasheet, Volume 2 17 17
- 18 Datasheet, Volume 2 18
- Datasheet, Volume 2 19 19
- 20 Datasheet, Volume 2 20
- Datasheet, Volume 2 21 21
- 22 Datasheet, Volume 2 22
- Datasheet, Volume 2 23 23
- Revision History 24
- 1 Introduction 25
- 1.2 Related Documents 27
- 1.3 Register Terminology 28
- Introduction 30
- 30 Datasheet, Volume 2 30
- 2 Configuration Process and 31
- 32 Datasheet, Volume 2 32
- Datasheet, Volume 2 33 33
- 2.2.1 CSR Access 34
- 2.2.2 PCI Bus Number 34
- 2.2.3 Uncore Bus Number 34
- 2.3 Configuration Mechanisms 35
- 2.4 Device Mapping 35
- Configuration Registers 37
- Capability 38
- Type0 Header 38
- PCIe Capability 38
- PM Capability 38
- Datasheet, Volume 2 39 39
- Offset 00h–0FCh 40
- Offset 200h–2FCh 42
- Legacy Configuration Map 43
- 0h–1FFh 44
- 200h–2FCh 45
- Offset 400h–4FCh 46
- Common Configuration Space) 47
- : F0h (DMI2 MODE) 70
- : 98h (PCIe* MODE) 70
- : 9Ch (PCIe* MODE) 72
- B0h (DMI2 MODE) 73
- B2h (DMI2 MODE) 75
- : 1C2h (DMI2 MODE) 88
- : C2h (PCIe* MODE) 88
- Express 90
- Register – DMI2 Mode 95
- Register – Root Ports 96
- Register – DMI2 Port/PCIe* 107
- Bit Attr 108
- Header Register 109
- AER status bit to be set 115
- Error Mask Register 120
- Mask Register 121
- Control Register 121
- : 49C, 4A0 130
- : 4A4, 4A8 132
- 0, offset 50h] 134
- Table 3-10. Intel 146
- Table 3-11. Intel 147
- Table 3-12. Intel 148
- Offset 0h–FFh 149
- Offset 100h–1FFh 150
- 300h–3FFh 152
- Offset 00h–FFh 153
- Offset 200h–2FFh 154
- Express space 155
- “Capabilities List.” 156
- 3.3.3 Intel 160
- Base Address Register 161
- Limit Address Register 162
- 3.3.3.13 MENCMEM_LIMIT—Intel 165
- Address Register 165
- Decode Register 170
- VT-d Registers 173
- 3.3.3.26 VTGENCTRL—Intel 173
- 3.3.3.27 VTISOCHCTRL—Intel 174
- 3.3.3.28 VTGENCTRL2—Intel 175
- 3.3.3.31 VTUNCERRMSK—Intel 177
- 3.3.3.32 VTUNCERRSEV—Intel 177
- 3.3.3.33 VTUNCERRPTR—Intel 178
- DFx 0 Register 182
- DFx 1 Register 183
- Select Register 184
- 3.3.5 Local Error Registers 202
- Log 0 Register 204
- Log Register 216
- Header 0 Log Register 217
- I/OxAPIC Register 221
- Register Map Table 227
- 3.3.7.1 INDX—Index Register 228
- 3.3.7.2 WNDW—Window Register 228
- 3.3.7.4 EOI Register 229
- 3.3.7.5 APICID Register 229
- 3.3.7.6 VER—Version Register 229
- 3.3.8 Intel 233
- VT-d Memory Mapped Register 233
- Table 3-21. Intel 234
- Table 3-22. Intel 235
- Table 3-23. Intel 236
- Table 3-24. Intel 237
- Table 3-25. Intel 238
- 3.3.8.2 VTD0_CAP—Intel 239
- VT-d Capabilities Register 239
- VT-d Capability Register 240
- Base Register 248
- Pointer Register 250
- Status Register 251
- 3.3.8.44 VTD1_CAP—Intel 262
- Event Address Register 274
- Registers 277
- Register 277
- 4.1.6 CCR—Class Code Register 280
- DID VID 0h DRAM_RULE 80h 284
- Offset 00h–FCh 285
- Function 0, Offset 00h–FCh 287
- Function 0, Offset 100h–1FCh 288
- Offset 100h–1FCh 290
- DID VID 0h 80h 293
- 100h–1FCh 294
- 100h–1FCh 294
- 100h–1FCh 294
- 300h–3FCh 296
- 300h–3FCh 296
- 300h–3FCh 296
- DID VID 0h ROUNDTRIP0 80h 298
- 100h 180h 299
- 4.2.3 CBO unicast CSRs 301
- Pipe Response Function 303
- 4.2.3.8 SadDbgMm2 Register 304
- Configuration Shadow Register 311
- Target Register 339
- Config Register 343
- Counter Register 344
- 4.2.7.7 MH_EXT_STAT Register 347
- Type Registers 357
- : 80h, 84h, 88h 358
- OFFSET Register 359
- Limit Register 360
- Configuration Register 408
- Accumulator Register 412
- Threshold Register 412
- Timing Registers 418
- Parameter Register 419
- Register 420
- MR0 Shadow Register 426
- 4.2.14.12 RPQAGE Register 427
- 4.2.14.27 WDAR_MODE Register 436
- 4.2.14.28 SPARING Register 437
- ADDR Seq 0 Register 437
- Update Seq 0 Register 438
- LFSR Seq 0 Register 439
- Control Seq 0 Register 440
- Rank 0 Register 454
- 4.3.1 CSR Register Maps 465
- 4.4.1 CSR Register Maps 472
- 4.4.2 PCU0 Registers 476
- : 64h, 68h, 6Ch, 70h 478
- Limitation Register 486
- 4.4.3 PCU1 Registers 488
- 4.4.4 PCU2 Registers 498
- CH0 Register 503
- 4.4.5.2 CAP_HDR Register 509
- 4.4.5.3 CAPID0 Register 510
- 4.4.5.4 CAPID1 Register 511
- 4.4.5.5 CAPID2 Register 513
- 4.4.5.6 CAPID3 Register 514
- 4.4.5.7 CAPID4 Register 515
- 4.5.1 CSR Group 517
- 4.5.2.8 EVENTS_DEBUG Register 523
- Scratchpad 0 Register 523
- SMI generation control 526
- 4.6.1 CSR Register Maps 528
- Ch, E0h, E4h, E8h 530
- 4.6.2.7 HaPerfmonAddrMatch0— 533
- 4.6.2.8 HaPerfmonAddrMatch1— 533
- Value Register 534
- 4.7.1.5 R2PINGDBG Register 537
- 4.7.1.6 R2PEGRDBG Register 538
- 4.7.1.8 R2EGRERRLOG Register 539
- 4.7.1.9 R2EGRERRMSK Register 540
- 4.8 MISC Registers 543
- DDRIOTXRXBotRank0 Register 546
- DDRIOCompOvrOfst2 Register 555
- TCO evaluation 556
- 4.8.21 TXALIGN_EN Register 560
- 4.8.22 TXEQ_LVL0_0 Register 561
- 4.8.23 TXEQ_LVL0_1 Register 561
- 4.8.24 TXEQ_LVL1_0 Register 561
- 4.8.25 TXEQ_LVL1_1 Register 562
- 4.8.26 TXEQ_LVL2_0 Register 562
- 4.8.27 TXEQ_LVL2_1 Register 562
- 4.8.28 TXEQ_LVL3_0 Register 563
- 564 Datasheet, Volume 2 564
Prodotti e manuali riguardandi Processori Intel 2760QM
Processori Intel i7-2960XM Scheda Tecnica
(98 pagine)
(98 pagine)
Processori Intel Core 2 Duo E7300 Specifiche
(49 pagine)
(49 pagine)
Processori Intel Pentium D 840 Scheda Tecnica
(106 pagine)
(106 pagine)
Processori Intel SL22T Specifiche
(35 pagine)
(35 pagine)
Processori Intel E3-1275 Scheda Tecnica
(300 pagine)
(300 pagine)
Processori Intel T1700 Scheda Tecnica
(98 pagine)
(98 pagine)
Processori Intel 2 Duo T7500 Scheda Tecnica
(87 pagine)
(87 pagine)
Processori Intel L5618 Scheda Tecnica
(64 pagine)
(64 pagine)
Processori Intel B940 Scheda Tecnica
(360 pagine)
(360 pagine)
Processori Intel core 2 Duo T5850 Specifiche
(292 pagine)
(292 pagine)
Processori Intel AT80569KJ073N Scheda Tecnica
(102 pagine)
(102 pagine)
Samsung RD050MHXCA Series podręczniki
Instrukcje obsługi i podręczniki użytkownika dla Klimatyzatory typu split Samsung RD050MHXCA Series.
Dostarczamy 1 pdf podręczników Samsung RD050MHXCA Series do pobrania za darmo według typów dokumentów: Dokumentacja
Samsung RD050MHXCA Series Dokumentacja (39 strony)
Marka: Samsung | Kategoria: Split-system air conditioners | Rozmiar: 0.39 MB |
Spis treści
Więcej produktów i instrukcji dla Klimatyzatory typu split Samsung
| Modele | Rodzaj dokumentu |
|---|---|
| ASV18E Series |
Instrukcja Użytkownika
Product Specification [en] ,
15 strony
|
| AW078AA |
Dokumentacja
Samsung AW078AA Product specifications,
49 strony
|
| ASV12E Series |
Instrukcja Użytkownika
Product Specification,
33 strony
|
| Smart A/C application |
Instrukcja Użytkownika
Samsung Smart A/C application User manual,
28 strony
|
| SH12AWHDX |
Instrukcja Użytkownika
ROOM AIR CONDITIONER [en] ,
1 strony
|
| AWT18FAMEA |
Instrukcja Użytkownika
The Joys and Sorrows of Teaching and Developing Apps for Mobile,
38 strony
|
| AQ09UBT |
Instrukcja Użytkownika
Samsung AQ09UBT Manual do usuário,
40 strony
|
| AH68-02273S |
Instrukcja Użytkownika
Samsung HW-C450 User manual,
21 strony
|
| AWT18FAMEA |
Instrukcja Użytkownika
JogAmp Fast Media & Processing,
55 strony
|
| AQ07S2GE |
Dokumentacja
Samsung AQ07S2GE Product specifications [en] ,
54 strony
|
| AH68-02055S |
Instrukcja Użytkownika
Samsung AH68-02055S User manual,
72 strony
|
| NS1004PXEA |
Instrukcja Użytkownika
2013 Samsung Air Conditioner,
21 strony
|
| ACH1800E |
Instrukcja Użytkownika
 
owner`s instructions manual de instrucciones istruzioni per l`uso,
36 strony
|
| HL-P6167W |
Dokumentacja
Samsung HL-P6167W Specifications,
102 strony
|
| SH09BPDX |
Dokumentacja
Samsung SH09BPDX Product specifications,
56 strony
|
| AW07ANBB |
Dokumentacja
Samsung AW07ANBB Specifications,
19 strony
|
| AS30C1(C2)(C3)(C4)BCD |
Instrukcja Użytkownika
owner`s instructions manual de instrucciones istruzioni per l`uso,
24 strony
|
| DH070EAV1 |
Instrukcja Użytkownika
Samsung DH090EAV User manual,
17 strony
|
| Smart A/C application | Instrukcja Użytkownika Samsung Smart WiFi-modul, 19 strony |
| Air Conditioner |
Instrukcja Użytkownika
Samsung Smart Series™ Air Conditioners,
6 strony
|
© 2020, manymanuals.it. Tutti i diritti riservati | 0.044 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Commenti su questo manuale