Intel 2760QM Scheda Tecnica Pagina 397
- Pagina / 564
- Indice
- SEGNALIBRI
Valutato. / 5. Basato su recensioni clienti
Datasheet, Volume 2 397
Processor Uncore Configuration Registers
4.2.12.34 RIRILV7OFFSET_3—RIR Range Rank Interleave 7
OFFSET Register
4.2.12.35 RIRILV0OFFSET_4—RIR Range Rank Interleave 0
OFFSET Register
RIRILV7OFFSET_3
Bus: 1 Device: 15 Function: 2 Offset: 19Ch
Bus: 1 Device: 15 Function: 3 Offset: 19Ch
Bus: 1 Device: 15 Function: 4 Offset: 19Ch
Bus: 1 Device: 15 Function: 5 Offset: 19Ch
Bit Attr
Reset
Value
Description
31:20 RV 0h Reserved
19:16 RW-LB 0h
RIR_RNK_TGT7
Target rank ID for rank interleave 7 (used for 1/2/4/8-way RIR interleaving).
15 RV 0h Reserved
14:2 RW-LB 0h
RIR_OFFSET7
RIR[5:0].RANKOFFSET7[38:26] == rank interleave 0 offset, 64 MB granularity
(processor’s minimum rank size is 512 MB. 512 MB/8 interleave = 64 MB per 8-
way interleave.)
1:0 RV 0h Reserved
RIRILV0OFFSET_4
Bus: 1 Device: 15 Function: 2 Offset: 1A0h
Bus: 1 Device: 15 Function: 3 Offset: 19Ch
Bus: 1 Device: 15 Function: 4 Offset: 19Ch
Bus: 1 Device: 15 Function: 5 Offset: 19Ch
Bit Attr
Reset
Value
Description
31:20 RV 0h Reserved
19:16 RW-LB 0h
RIR_RNK_TGT0
Target rank ID for rank interleave 0 (used for 1/2/4/8-way RIR interleaving).
15 RV 0h Reserved
14:2 RW-LB 0h
RIR_OFFSET0
RIR[5:0].RANKOFFSET0[38:26] == rank interleave 0 offset, 64 MB granularity
(processor’s minimum rank size is 512 MB. 512 MB/8 interleave = 64 MB per 8-
way interleave.)
1:0 RV 0h Reserved
- Datasheet, Volume 2 1
- November 2011 1
- Contents 3
- 4 Datasheet, Volume 2 4
- Datasheet, Volume 2 5 5
- 6 Datasheet, Volume 2 6
- Datasheet, Volume 2 7 7
- 8 Datasheet, Volume 2 8
- Datasheet, Volume 2 9 9
- 10 Datasheet, Volume 2 10
- Datasheet, Volume 2 11 11
- 12 Datasheet, Volume 2 12
- Datasheet, Volume 2 13 13
- 14 Datasheet, Volume 2 14
- Datasheet, Volume 2 15 15
- 16 Datasheet, Volume 2 16
- Datasheet, Volume 2 17 17
- 18 Datasheet, Volume 2 18
- Datasheet, Volume 2 19 19
- 20 Datasheet, Volume 2 20
- Datasheet, Volume 2 21 21
- 22 Datasheet, Volume 2 22
- Datasheet, Volume 2 23 23
- Revision History 24
- 1 Introduction 25
- 1.2 Related Documents 27
- 1.3 Register Terminology 28
- Introduction 30
- 30 Datasheet, Volume 2 30
- 2 Configuration Process and 31
- 32 Datasheet, Volume 2 32
- Datasheet, Volume 2 33 33
- 2.2.1 CSR Access 34
- 2.2.2 PCI Bus Number 34
- 2.2.3 Uncore Bus Number 34
- 2.3 Configuration Mechanisms 35
- 2.4 Device Mapping 35
- Configuration Registers 37
- Capability 38
- Type0 Header 38
- PCIe Capability 38
- PM Capability 38
- Datasheet, Volume 2 39 39
- Offset 00h–0FCh 40
- Offset 200h–2FCh 42
- Legacy Configuration Map 43
- 0h–1FFh 44
- 200h–2FCh 45
- Offset 400h–4FCh 46
- Common Configuration Space) 47
- : F0h (DMI2 MODE) 70
- : 98h (PCIe* MODE) 70
- : 9Ch (PCIe* MODE) 72
- B0h (DMI2 MODE) 73
- B2h (DMI2 MODE) 75
- : 1C2h (DMI2 MODE) 88
- : C2h (PCIe* MODE) 88
- Express 90
- Register – DMI2 Mode 95
- Register – Root Ports 96
- Register – DMI2 Port/PCIe* 107
- Bit Attr 108
- Header Register 109
- AER status bit to be set 115
- Error Mask Register 120
- Mask Register 121
- Control Register 121
- : 49C, 4A0 130
- : 4A4, 4A8 132
- 0, offset 50h] 134
- Table 3-10. Intel 146
- Table 3-11. Intel 147
- Table 3-12. Intel 148
- Offset 0h–FFh 149
- Offset 100h–1FFh 150
- 300h–3FFh 152
- Offset 00h–FFh 153
- Offset 200h–2FFh 154
- Express space 155
- “Capabilities List.” 156
- 3.3.3 Intel 160
- Base Address Register 161
- Limit Address Register 162
- 3.3.3.13 MENCMEM_LIMIT—Intel 165
- Address Register 165
- Decode Register 170
- VT-d Registers 173
- 3.3.3.26 VTGENCTRL—Intel 173
- 3.3.3.27 VTISOCHCTRL—Intel 174
- 3.3.3.28 VTGENCTRL2—Intel 175
- 3.3.3.31 VTUNCERRMSK—Intel 177
- 3.3.3.32 VTUNCERRSEV—Intel 177
- 3.3.3.33 VTUNCERRPTR—Intel 178
- DFx 0 Register 182
- DFx 1 Register 183
- Select Register 184
- 3.3.5 Local Error Registers 202
- Log 0 Register 204
- Log Register 216
- Header 0 Log Register 217
- I/OxAPIC Register 221
- Register Map Table 227
- 3.3.7.1 INDX—Index Register 228
- 3.3.7.2 WNDW—Window Register 228
- 3.3.7.4 EOI Register 229
- 3.3.7.5 APICID Register 229
- 3.3.7.6 VER—Version Register 229
- 3.3.8 Intel 233
- VT-d Memory Mapped Register 233
- Table 3-21. Intel 234
- Table 3-22. Intel 235
- Table 3-23. Intel 236
- Table 3-24. Intel 237
- Table 3-25. Intel 238
- 3.3.8.2 VTD0_CAP—Intel 239
- VT-d Capabilities Register 239
- VT-d Capability Register 240
- Base Register 248
- Pointer Register 250
- Status Register 251
- 3.3.8.44 VTD1_CAP—Intel 262
- Event Address Register 274
- Registers 277
- Register 277
- 4.1.6 CCR—Class Code Register 280
- DID VID 0h DRAM_RULE 80h 284
- Offset 00h–FCh 285
- Function 0, Offset 00h–FCh 287
- Function 0, Offset 100h–1FCh 288
- Offset 100h–1FCh 290
- DID VID 0h 80h 293
- 100h–1FCh 294
- 100h–1FCh 294
- 100h–1FCh 294
- 300h–3FCh 296
- 300h–3FCh 296
- 300h–3FCh 296
- DID VID 0h ROUNDTRIP0 80h 298
- 100h 180h 299
- 4.2.3 CBO unicast CSRs 301
- Pipe Response Function 303
- 4.2.3.8 SadDbgMm2 Register 304
- Configuration Shadow Register 311
- Target Register 339
- Config Register 343
- Counter Register 344
- 4.2.7.7 MH_EXT_STAT Register 347
- Type Registers 357
- : 80h, 84h, 88h 358
- OFFSET Register 359
- Limit Register 360
- Configuration Register 408
- Accumulator Register 412
- Threshold Register 412
- Timing Registers 418
- Parameter Register 419
- Register 420
- MR0 Shadow Register 426
- 4.2.14.12 RPQAGE Register 427
- 4.2.14.27 WDAR_MODE Register 436
- 4.2.14.28 SPARING Register 437
- ADDR Seq 0 Register 437
- Update Seq 0 Register 438
- LFSR Seq 0 Register 439
- Control Seq 0 Register 440
- Rank 0 Register 454
- 4.3.1 CSR Register Maps 465
- 4.4.1 CSR Register Maps 472
- 4.4.2 PCU0 Registers 476
- : 64h, 68h, 6Ch, 70h 478
- Limitation Register 486
- 4.4.3 PCU1 Registers 488
- 4.4.4 PCU2 Registers 498
- CH0 Register 503
- 4.4.5.2 CAP_HDR Register 509
- 4.4.5.3 CAPID0 Register 510
- 4.4.5.4 CAPID1 Register 511
- 4.4.5.5 CAPID2 Register 513
- 4.4.5.6 CAPID3 Register 514
- 4.4.5.7 CAPID4 Register 515
- 4.5.1 CSR Group 517
- 4.5.2.8 EVENTS_DEBUG Register 523
- Scratchpad 0 Register 523
- SMI generation control 526
- 4.6.1 CSR Register Maps 528
- Ch, E0h, E4h, E8h 530
- 4.6.2.7 HaPerfmonAddrMatch0— 533
- 4.6.2.8 HaPerfmonAddrMatch1— 533
- Value Register 534
- 4.7.1.5 R2PINGDBG Register 537
- 4.7.1.6 R2PEGRDBG Register 538
- 4.7.1.8 R2EGRERRLOG Register 539
- 4.7.1.9 R2EGRERRMSK Register 540
- 4.8 MISC Registers 543
- DDRIOTXRXBotRank0 Register 546
- DDRIOCompOvrOfst2 Register 555
- TCO evaluation 556
- 4.8.21 TXALIGN_EN Register 560
- 4.8.22 TXEQ_LVL0_0 Register 561
- 4.8.23 TXEQ_LVL0_1 Register 561
- 4.8.24 TXEQ_LVL1_0 Register 561
- 4.8.25 TXEQ_LVL1_1 Register 562
- 4.8.26 TXEQ_LVL2_0 Register 562
- 4.8.27 TXEQ_LVL2_1 Register 562
- 4.8.28 TXEQ_LVL3_0 Register 563
- 564 Datasheet, Volume 2 564
Prodotti e manuali riguardandi Processori Intel 2760QM
Processori Intel i7-2960XM Scheda Tecnica
(98 pagine)
(98 pagine)
Processori Intel Core 2 Duo E7300 Specifiche
(49 pagine)
(49 pagine)
Processori Intel Pentium D 840 Scheda Tecnica
(106 pagine)
(106 pagine)
Processori Intel SL22T Specifiche
(35 pagine)
(35 pagine)
Processori Intel E3-1275 Scheda Tecnica
(300 pagine)
(300 pagine)
Processori Intel T1700 Scheda Tecnica
(98 pagine)
(98 pagine)
Processori Intel 2 Duo T7500 Scheda Tecnica
(87 pagine)
(87 pagine)
Processori Intel L5618 Scheda Tecnica
(64 pagine)
(64 pagine)
Processori Intel B940 Scheda Tecnica
(360 pagine)
(360 pagine)
Processori Intel core 2 Duo T5850 Specifiche
(292 pagine)
(292 pagine)
Processori Intel AT80569KJ073N Scheda Tecnica
(102 pagine)
(102 pagine)
Atec AEMC-6472_6474 manuels
Manuels d'utilisation et guides de l'utilisateur pour Équipement Atec AEMC-6472_6474.
Nous fournissons des manuels en pdf 1 Atec AEMC-6472_6474 à télécharger gratuitement par type de document : Manuel de l'utilisateur
Atec AEMC-6472_6474 Manuel de l'utilisateur (4 pages)
marque: Atec | Catégorie: Equipment | Taille: 1.27 MB |
Table des matières
Plus de produits et de manuels pour Équipement Atec
| Modèles | Type de document |
|---|---|
| AEMC-4620_4630 |
Manuel de l'utilisateur
Atec AEMC-4620_4630 User Manual,
6 pages
|
| Biddle-DET-2-2 |
Manuel de l'utilisateur
Atec Biddle-DET-2-2 User Manual,
2 pages
|
| Chroma-19572 |
Manuel de l'utilisateur
Atec Chroma-19572 User Manual,
2 pages
|
| AEMC-6416-6417 |
Manuel de l'utilisateur
Atec AEMC-6416-6417 User Manual,
4 pages
|
| Biddle-DET3-2 |
Manuel de l'utilisateur
Atec Biddle-DET3-2 User Manual,
5 pages
|
| AEMC-6470 |
Manuel de l'utilisateur
Atec AEMC-6470 User Manual,
2 pages
|
| Biddle-DET5-2 |
Manuel de l'utilisateur
Atec Biddle-DET5-2 User Manual,
2 pages
|
| AEMC-6470B |
Manuel de l'utilisateur
Atec AEMC-6470B User Manual,
8 pages
|
| AEMC-4500 |
Manuel de l'utilisateur
Atec AEMC-4500 User Manual,
5 pages
|
| AEMC-3620 |
Manuel de l'utilisateur
Atec AEMC-3620 User Manual,
6 pages
|
| Amplifier-Research-FL7040-Kit |
Manuel de l'utilisateur
Atec Amplifier-Research-FL7040-Kit User Manual,
2 pages
|
| Amplifier-Research-FP7018 |
Manuel de l'utilisateur
Atec Amplifier-Research-FP7018 User Manual,
1 pages
|
| AmplifierResearch_FL7060 |
Manuel de l'utilisateur
Atec AmplifierResearch_FL7060 User Manual,
2 pages
|
| Associated-Research-5030DT |
Manuel de l'utilisateur
Atec Associated-Research-5030DT User Manual,
4 pages
|
| AmplifierResearch_FP7003-Kit |
Manuel de l'utilisateur
Atec AmplifierResearch_FP7003-Kit User Manual,
1 pages
|
| Amplifier-Research-FM7004 |
Manuel de l'utilisateur
Atec Amplifier-Research-FM7004 User Manual,
2 pages
|
| Associated-Research-3130_3140_3160 |
Manuel de l'utilisateur
Atec Associated-Research-3130_3140_3160 User Manual,
2 pages
|
| Associated-Research-3140-60 |
Manuel de l'utilisateur
Atec Associated-Research-3140-60 User Manual,
2 pages
|
| ARA-Technologies-PLA-130-A |
Manuel de l'utilisateur
Atec ARA-Technologies-PLA-130-A User Manual,
2 pages
|
| Emco-6509 |
Manuel de l'utilisateur
Atec Emco-6509 User Manual,
2 pages
|
© 2020, manymanuals.it. Tutti i diritti riservati | 0.063 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Commenti su questo manuale