Intel LE80537GF0414M Scheda Tecnica Pagina 14
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- Indice
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Identification Information
14 Specification Update
QDF#/
S-Spec
Processor
Number
Package
Processor
Stepping
FSB
(MHz)
Speed
HFM/LFM
(GHz)
Notes
QUGO
T5500
Micro-FCBGA
L-2
667
1.66/1.00
2,3
SLV3W
U7600
Micro-FCBGA
M-0
533
1.20/0.80
3,5
SLAUS
U7600
Micro-FCBGA
M-0
533
1.20/0.80
3,5
SL9U3
T5600
Micro-FCPGA
L-2
667
1.83/1.00
2,3
SL9U7
T5600
Micro-FCBGA
L-2
667
1.83/1.00
2,3
SL9U4
T5500
Micro-FCPGA
L-2
667
1.66/1.00
2,3
SL9U8
T5500
Micro-FCBGA
L-2
667
1.66/1.00
2,3
SL9WE
T5300
Micro-FCPGA
L-2
533
1.73/0.80
2,3
QUFY
n/a
Micro-FCPGA
L-2
533
1.73/0.80
2,3
QTRJ
n/a
Micro-FCPGA
B-2
533
1.60/0.80
2,3
SL9VP
T5200
Micro-FCPGA
B-2
533
1.60/0.80
2,3
S LGFX
L7400
Micro-FCBGA
G-2
667
1.50/1.00
3,4
SL9SM
L7400
Micro-FCBGA
B-2
667
1.50/1.00
3,4
SL9SN
L7200
Micro-FCBGA
B-2
667
1.33/1.00
3,4
QZJC
U2100
Micro-FCBGA
A-1
533
1.06/0.80
3,6
QZIX
U2200
Micro-FCBGA
A-1
533
1.20/0.80
3,6
SLAUR
U7700
Micro-FCBGA
M-0
533
1.33/1.00
3,5
NOTES:
1. Intel
®
Core™2 Duo processor Standard Voltage with 4-M L2 cache.
2. Intel
®
Core™2 Duo processor Standard Voltage with 2-M L2 cache.
3. V
CC_CORE
= (1.250-1.075)/ (0.95-0.85) V for Highest/Lowest (HFM/LFM) / Deeper Sleep
VID = (0.75-0.65) V / Intel
®
Enhanced Deeper Sleep VID = (0.65) V.
4. Intel
®
Core™2 Duo processor Low Voltage with 4-M L2 cache.
5. Intel
®
Core™2 Duo processor Ultra Low Voltage with 2-M L2 cache.
6. Intel
®
Core™2 Solo processor Ultra Low Voltage with 1-M L2 cache.
Table 2. Intel
®
Core™2 Duo Processor – Mobile Intel
®
965 Express Chipset Family
Component Markings
QDF#/
S-Spec
Processor
Number
Package
Processor
Stepping
FSB
(MHz)
Speed
IDA
3
/HFM/L
FM/SLFM
4
(GHz)
Notes
QXJJ
T7700
Micro-FCPGA
E-1
800
2.60/2.40/1.2
0/0.80
1,2,3,6
QXJO
T7700
Micro-FCBGA
E-1
800
2.60/2.40/1.2
0/0.80
1,2,3,6
QXJK
T7500
Micro-FCPGA
E-1
800
2.40/2.20/1.2
0/0.80
1,2,3,5
QXJP
T7500
Micro-FCBGA
E-1
800
2.40/2.20/1.2
0/0.80
1,2,3,5
- Including Intel 1
- Specification Update 2
- Contents 3
- Revision History 4
- 6 Specification Update 6
- Preface 7
- Nomenclature 8
- Specification Update 9 9
- Identification Information 10
- Table 3. Intel 13
- 945 Express Chipset Family 13
- Component Markings 13
- 14 Specification Update 14
- Table 2. Intel 14
- 965 Express Chipset Family 14
- 16 Specification Update 16
- Table 1. Intel 17
- Celeron 17
- 18 Specification Update 18
- Summary Tables of Changes 19
- Specification Update 21 21
- Errata for Intel 22
- 24 Specification Update 24
- 26 Specification Update 26
- 28 Specification Update 28
- Based on Mobile Intel 29
- 30 Specification Update 30
- 32 Specification Update 32
- 34 Specification Update 34
- 38 Specification Update 38
- May Terminate Early 38
- 40 Specification Update 40
- Specification Update 43 43
- Specification Update 45 45
- Not Be Accurate 46
- Specification 47
- Address Translations 47
- Specification Update 49 49
- Specification Update 51 51
- Invocation 52
- Specification Update 53 53
- Be Incorrect 54
- Specification Update 55 55
- Specification Update 57 57
- Accurate 59
- Specification Update 61 61
- Specification Update 63 63
- Shootdown 65
- Specification Update 67 67
- Address 68
- IA32_DEBUGCTL[12] Is Set 69
- Software Interrupts 71
- Specification Update 73 73
- Specification Update 75 75
- Specification Update 77 77
- Specification Update 79 79
- Instructions as Branches 81
- Signaled 82
- Information 83
- AH108. Overlap of an Intel 84
- VM Exit 84
- Count Some Transitions 85
- Memory-Ordering Violations 86
- Specification Update 87 87
- Shutdown 88
- Specification Update 89 89
- 90 Specification Update 90
- Erratum Affecting Only Intel 91
- Core™2 Duo Mobile 91
- Processors on Mobile Intel 91
- Be Able to Enter Intel 92
- Enhanced Deeper Sleep 92
- AH6P Activation of Intel 93
- Dynamic 93
- Specification Changes 94
- Specification Update 95 95
- Specification Clarifications 96
- Documentation Changes 97
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