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101

7-7

SYSTEM MANAGEMENT MODE

7.3.2.1 SMI# Priority

When more than one exception or interrupt is pending at an instruction boundary, the processor

services them in a predictable order. The priority among classes of exception and interrupt sourc-

es is shown in Table 7-3. The processor first services a pending exception or interrupt from the

class that has the highest priority, transferring execution to the first instruction of the handler.

Lower priority exceptions are discarded; lower priority interrupts are held pending. Discarded ex-

ceptions are reissued when the interrupt handler returns execution to the point of interruption.

SMI# has the following relative priority, where 1 is highest and 11 is lowest:

Table 7-3. Relative Priority of Exceptions and Interrupts

(Highest priority)

Double Fault

2 Segmentation Violation

3 Page Fault

4 Divide-by-zero

5SMI#

6 Single-step

7 Debug

8 ICE Break

9NMI

10 INTR

(Lowest Priority)

I/O Lock

1 2 ... 161 162 163 164 165 166 167 168 169 170 171 ... 690 691

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Intel 386 Manuale Utente Pagina 166

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