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Functional Architecture Intel® Workstation Board S5520SC TPS

Revision 1.7

Intel order number: E39530-010

The Unified Backplate Assembly is removable, allowing for the use of non-Intel

heatsink

retention solutions.

Figure 14. Unified Retention System and Unified Back Plate Assembly

3.3 Memory Subsystem

The Intel

Xeon

Processor 5500 Series on the Intel

Workstation Board S5520SC are

populated on CPU sockets. Each processor installed on the CPU socket has an integrated

memory controller (IMC), which supports up to three DDR3 channels and groups DIMMs on the

workstation into autonomous memory.

3.3.1 Memory Subsystem Nomenclature

The nomenclature for DIMM sockets implemented in the Intel

Workstation Board S5520SC is

represented in the following figures.

z DIMMs are organized into physical slots on DDR3 memory channels that belong to

processor sockets.

z The memory channels for CPU 1 socket are identified as Channels A, B, and C. The

memory channels for CPU 2 socket are identified as Channels D, E, and F.

z The DIMM identifiers on the silkscreen on the board provide information about which

channel/CPU Socket they belong to. For example, DIMM_A1 is the first slot on

Channel A of CPU 1 socket. DIMM_D1 is the first slot on Channel D of CPU 2

Socket.

z Processor sockets are self-contained and autonomous. However, all configurations

in the BIOS setup, such as RAS, Error Management, and so forth, are applied

commonly across sockets.

The Intel

Workstation Board S5520SC supports six DDR3 memory channels (three channels

per processor) with two DIMM slots per channel, thus supporting up to 12 DIMMs in a two-

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Intel S5520SC Specifiche Pagina 36